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SEMI-CONDUCTOR LABORATORY (SCL) has floated a tender for Corrigendum: Fpga Development and Evaluation Board, Qty: 20. The project location is Rupnagar, Chandigarh (UT), India. The reference number is GEM/2025/B/7010972 and it is closing on 03 Jan 2026. Suppliers can request Register free of cost to get the complete Tender details and download the document.
Procurement Summary
State: Chandigarh (UT)
Summary: Corrigendum: Fpga Development and Evaluation Board, Qty: 20
Deadline: 03 Jan 2026
Other Information
Notice Type: Tender
TOT Ref.No.: 132802536
Document Ref. No.: GEM/2025/B/7010972
Financier: Self Financed
Purchaser Ownership: Public
Document Fees: Refer Document
Tender Value: Refer Document
EMD: Refer Document
Purchaser's Detail
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Login to see detailsTender Details
FPGA Development and Evaluation Board (Q3)
Quantity Required: 20
Start Date: 17-12-2025 11:40 AM
End Date: 03-01-2026 12:00 PM
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