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CENTRAL ELECTRONICS LIMITED has floated a tender for Corrigendum: Fpga Development and Evaluation Board, Qty: 2. The project location is Ghaziabad, Uttar Pradesh, India. The reference number is GEM/2025/B/6970633 and it is closing on 22 Dec 2025. Suppliers can request Register free of cost to get the complete Tender details and download the document.
Procurement Summary
State: Uttar Pradesh
Summary: Corrigendum: Fpga Development and Evaluation Board, Qty: 2
Deadline: 22 Dec 2025
Other Information
Notice Type: Tender
TOT Ref.No.: 132406988
Document Ref. No.: GEM/2025/B/6970633
Financier: Self Financed
Purchaser Ownership: Public
Document Fees: Refer Document
Tender Value: Refer Document
EMD: Refer Document
Purchaser's Detail
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Login to see detailsTender Details
FPGA Development and Evaluation Board (Q3)
Quantity Required: 2
Start Date: 05-12-2025 4:47 PM
End Date: 22-12-2025 10:00 AM
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