Procurement Summary
Country: Japan
Summary: Cryocmos Circuit Teg Chip Layout Design and Circuit Teg Process Manufacturing 1 Set
Deadline: 05 Mar 2026
Posting Date: 31 Oct 2026
Other Information
Notice Type: Tender
TOT Ref.No.: 151805618
Document Ref. No.:
Competition: ICB
Financier: Self Financed
Purchaser Ownership: Public
Tender Value: Refer Document
CPV Classification
31712117 - Integrated circuit packages
31712300 - Printed circuits
31712100 - Microelectronic machinery and apparatus
Purchaser's Detail
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Tender Details
CryoCMOS Circuit TEG Chip Layout Design and Circuit TEG Process Manufacturing 1 Set
Classification: 0024 Professional/Scientific & Controlling Instruments & Apparatus
Summay of Notice: ⑴ Classification of the products to be procured : 24 ⑵ Nature and quantity of the products to be purchased : Cryo-CMOS Circuit TEG Chip Layout Design and Circuit TEG Process Manufacturing 1 Set ⑶ Time-limit for the submission of the comments : 17 : 00, March 5, 2026 ⑷ Contact point for the notice : IRIE Ayaka, Procurement Office 1, National Institute of Advanced Industrial Science and Technology, 1-1-1 Higashi, Tsukuba, Ibaraki, 305-8561 Japan. TEL 050-3522-4142
Documents
Tender Notice